Sizing a Buck Inductor: Ripple Ratio, Saturation and the CCM/DCM Boundary

Almost every buck design starts the inductor the same way. Pick 30% ripple, solve for the inductance $L$, round to the nearest standard value, check the saturation rating has some margin, and move on. It's a good rule, and it has been the default for twenty-five years. It comes from a real optimisation.

The optimum it targets is extremely flat, though. Any ripple ratio from about 0.24 to 0.43 costs no more than 5% above the minimum loss, so the precision implied by "30%" is fictitious. The ripple ratio also belongs to an operating point, and it moves as soon as the input voltage or the load does.

The saturation current you check it against has a different definition at every manufacturer. The spread is wide enough to reverse a part selection. If you want to size the inductor for your own design as you read, the buck inductor calculator works out the inductance and the peak and RMS currents.

The design: 12V to 1.8V, 20A at 500kHz

The example is the point-of-load converter from Why the Lowest RDS(on) Isn't the Best MOSFET for Your Buck Converter. It's a server or FPGA rail at 12V in, 1.8V out, 20A maximum load and 500kHz switching. The duty cycle is:

where $V_{OUT}$ is the output voltage and $V_{IN}$ is the input voltage.

So the high-side switch is on for 0.30µs and off for 1.70µs. During that off-time the inductor has $V_{OUT}$ across it, and the specification alone fixes the volt-seconds it must absorb:

where $E_t$ is the volt-seconds per cycle, $D$ is the duty cycle from above, and $T_s$ is the switching period. $T_s = 1/f_{sw}$, which is 2µs at a switching frequency $f_{sw}$ of 500kHz.

Nothing you choose changes that number. What you choose is how to split it between current and inductance, because $E_t = L \cdot \Delta I$, where $\Delta I$ is the peak-to-peak ripple current.

Ripple ratio is the actual design variable

Rather than working in amps, the design collapses to one dimensionless number. The current ripple ratio is the AC component divided by the DC component at maximum load [1]:

where $r$ is the ripple ratio, $\Delta I$ is the peak-to-peak ripple current and $I_O$ is the DC output current at maximum load, 20A here.

For our converter, $r$ = 0.3 gives $\Delta I$ = 6.0A, and thus:

where $L$ is the inductance, $E_t$ is the volt-seconds and $\Delta I$ is the ripple current.

The peak current follows immediately, and it's the number that decides whether the core saturates:

where $I_{pk}$ is the peak inductor current, $I_O$ is the full-load current and $r$ is the ripple ratio.

The RMS current decides how hot the winding gets, and it barely moves:

where $I_{rms}$ is the RMS inductor current, with $I_O$ and $r$ as before.

At $r$ = 0.3 the RMS current is 0.4% above the DC current. Even at $r$ = 0.6 it's only 1.1% above. Across the whole practical range of ripple ratios, the RMS current is just the load current for copper-loss purposes [1]. That's convenient. It also means the RMS current tells you nothing about whether your ripple choice was good.

Where the 30% rule comes from, and what it costs elsewhere

The rule traces back to TI/National's AN-1197 [1]. It derives the rule from the energy the inductor has to store, which is what sets its physical size:

where:

• $e$ is the peak energy stored in the inductor
• $L$ is the inductance and $I_{pk}$ is the peak current
• $E_t$ is the volt-seconds per cycle and $I_O$ is the full-load current
• $r$ is the ripple ratio

The specification fixes $E_t$ and $I_O$, so only the fraction $(1+r/2)^2/r$ varies. It falls steeply as $r$ rises from zero, then flattens out. The knee is at 20–40%, and the whole rule rests on it.

Past the knee, everything downstream gets worse. The output capacitor's RMS current is $\Delta I/\sqrt{12}$, directly proportional to $r$. Going from $r$ = 0.3 to $r$ = 0.6 cuts the inductor's stored energy by about 36%. It also doubles the output capacitor's RMS current, and thus quadruples its dissipation [1]. You've swapped a smaller inductor for an output capacitor that needs twice the ripple-current rating.

AC flux density rises as $\sqrt{r}$. Reducing $L$ reduces the flux swing for a given current swing, but $\Delta I$ rises at the same time. If you keep the same core, you get the lower inductance with fewer turns $N$. Since $L \propto N^2$ and $B_{AC} \propto L\Delta I / N$, the net result is $B_{AC} \propto \sqrt{r}$ [1]. Core loss follows $B_{AC}^\beta$, where $\beta$ is the core material's Steinmetz exponent, typically 2.2–2.6. So core loss climbs noticeably even before you move to a smaller core.

Input capacitor RMS current barely responds to $r$ at this duty cycle. At $D$ = 0.15 it's dominated by the $\sqrt{D(1-D)}$ term. That term is about 7.2A, four times the output capacitor's 1.7A. At higher duty cycles the dependence on $r$ is much stronger. That's why AN-1197 plots it against duty cycle and warns about the cost on the input capacitor [1].

For low-duty point-of-load designs the input capacitor is a big problem, but your ripple choice doesn't make it much worse. The switch RMS currents behave the same way. Why the Lowest RDS(on) Isn't the Best MOSFET for Your Buck Converter covers what they do to conduction loss.

The loss optimum is a basin, not a point

Energy is a proxy for size. If what you care about is efficiency, the trade is between DC copper loss and core loss, and it runs the other way.

In one package family, the DC resistance (DCR) scales roughly with inductance. TI note that in the same form factor, a 1µH part has about twice the DCR of a 0.56µH part [2]. So more inductance means less ripple and more copper resistance. Less inductance means less copper, a bigger flux swing and more core loss. For Fig. 3 I took DCR ≈ 1mΩ/µH for a 20A-class part and $\beta$ = 2.3.

The minimum is at 0.47µH, which is $r$ = 0.32. But the curve either side of it is nearly flat. Anything from 0.35µH to 0.63µH costs no more than 5% above the minimum, which is a ripple ratio from 0.24 to 0.43. TI's own measurements show the same thing over an even wider span, with total loss nearly flat from $r$ = 0.2 to 0.6 [2].

Fig. 3 is a model, not a measurement, so I checked how much it depends on my numbers. The core loss is calibrated to 0.15W at $r$ = 0.3. Halve or double that, or the DCR slope, and the minimum moves anywhere from $r$ = 0.17 to 0.62. The width doesn't move. The 5% band always spans a factor of 1.8 in inductance, because the two exponents set it on their own.

That's the useful thing to take from the rule. The objective is flat over nearly a factor of two in inductance, and where that range sits depends on your part's balance of core and copper loss. Richtek reach the same conclusion from an independent area-product derivation, and land nearer 0.42–0.48 for their example [3]. Their answer and 0.3 can both be right for different parts. So spend your effort on the constraints that aren't flat: saturation margin, temperature rise and cost. Then take whichever standard value in the range does best on those.

The ripple ratio is not a property of your design

$r$ is defined at one operating point: maximum load, at one input voltage. Your converter doesn't stay there.

Rearranging, the inductance needed to hold a given $r$ is:

where:

• $L$ is the inductance
• $V_{OUT}$ and $V_{IN}$ are the output and input voltages
• $r$ is the ripple ratio and $I_O$ is the full-load current
• $f_{sw}$ is the switching frequency

That's a function of $V_{IN}$. Over a 6–18V input range, holding $r$ = 0.3 takes 0.42µH at low line and 0.54µH at high line, a 29% spread. You can only fit one inductor, and then $r$ is whatever each operating point makes it.

For this design the effect is mild. $r$ wanders from 0.247 to 0.318, comfortably inside the basin from Fig. 3, so the design is insensitive. For a wide-input converter it isn't mild at all, and you need to check the extremes rather than the nominal:

• Peak current, and thus saturation, is worst at maximum input voltage and maximum load. High line gives the largest $\Delta I$.
• DCM onset is worst at maximum input voltage and minimum load, for the same reason.
• Core loss is worst at maximum input voltage, since $B_{AC}$ tracks $\Delta I$.

Specify $r$ at nominal if you like, but verify at the corners. The same applies to the component values. Inductance carries a ±20% tolerance before DC bias and temperature are even considered. Worst-Case Phase Margin: What Component Tolerance Does to Your Buck Converter works through what that does to a compensated loop.

The CCM/DCM boundary sits at r = 2

One value of $r$ is a boundary rather than a preference. As the load current $I_{load}$ falls at a fixed input voltage, $\Delta I$ stays constant while the DC level drops, so $r$ rises. When the trough of the triangle reaches zero, the inductor current becomes discontinuous. That happens when $\Delta I/2 = I_{load}$, which is $r = 2$ [1], [3].

The load at which it happens follows directly. If a design has ripple ratio $r$ at full load, it enters DCM at:

where $I_{DCM}$ is the load current at the boundary, $r$ is the ripple ratio at full load and $I_O$ is the full-load current.

For our converter at 12V, that's $0.15 \times 20\text{A} = 3.0\text{A}$, 15% of full load.

Treat that 15% as a design output. Below it, three things change at once [4]. The plant loses its LC double pole and becomes nearly first-order, which changes the loop you compensated. What Does a Compensator Do? Voltage-Mode Buck Loop Design Explained covers what the double pole was doing in the first place. The conversion ratio stops being $D$ and starts to depend on load.

A synchronous design running forced PWM doesn't enter DCM at all. It circulates negative inductor current instead, and gives up light-load efficiency for a plant model that stays put. Choosing a larger inductor to hold CCM down to a lower load is a legitimate reason to move away from the loss optimum, and one of very few.

Now read the datasheet: two current ratings that mean less than they look

Every power inductor datasheet gives two current ratings, and they answer two different questions [5]. The saturation rating $I_{sat}$ is about the core, and you check it against the peak current. The RMS rating is about self-heating, and you check it against the RMS current. I'll write it $I_{rated}$ to keep it apart from the operating $I_{rms}$. Here you check $I_{sat}$ against $I_{pk}$ = 23.0A and $I_{rated}$ against $I_{rms}$ = 20.07A. Neither rating means what its name suggests.

Saturation: the same part, many different ratings

$I_{sat}$ is the DC bias at which inductance has fallen by a specified amount from its zero-bias value. That amount isn't standardised. Vishay rate the IHLP series at a 20% drop. They note plainly that some manufacturers rate at 30%, which makes a part "appear to have better saturation" [6]. TI describe the typical definition as inductance falling to 70% of nominal, a 30% drop [2]. Coilcraft's selection guide says 10–20% is common but that some catalogues use 50% [5]. The example part in that same document is specified at 30%.

So the range in active use runs from 10% to 50%. A comparison table of $I_{sat}$ values means little until you've read each footnote.

How much this matters depends on the core, and that's the second thing the number hides. Ferrite drum cores saturate hard. Inductance holds flat and then collapses at a knee. Powder and composite cores saturate soft, rolling off gradually from low current with no knee at all [6].

For the ferrite, the four definitions sit within 30% of each other. The knee is sharp enough that it hardly matters which one you use. For the powder core, the same four definitions give ratings a factor of 2.7 apart. The definition matters most where the part is most forgiving, and that's also where a vendor gains most from choosing a generous one.

That leads to opposite design rules for the two materials:

• Hard-saturating (ferrite). Keep $I_{pk}$ below the rating with real margin. Past the knee, inductance collapses and $di/dt$ runs away. The current can rise out of control in a single switching cycle [6].
• Soft-saturating (powder or composite). Running peaks near or slightly beyond the quoted rating is often acceptable. Coilcraft point out that it's desirable to run peaks near the saturation rating, because that lets you use the smallest part [5]. What you lose is inductance. Less inductance raises the ripple, which raises the peak current again, so check where it settles rather than assuming.

The inductance itself is a small-signal number. It's measured at 100kHz–1MHz, with about 0.1Vrms applied and no DC bias [5]. Your converter sees the large-signal inductance at 20A. It's the same class of error as reading the output capacitance $C_{oss}$ off the front page of a MOSFET datasheet. Both are curves, sampled at one convenient point and presented as a constant.

RMS current: a 40°C rise, measured with DC

$I_{rated}$ is the continuous current that produces a specified temperature rise. The usual rise is 40°C for power inductors and 15°C for chip inductors [2], [5].

The rise is on top of ambient, in still air, on the manufacturer's test board. An inductor next to a hot MOSFET on a dense board sits in a different thermal environment from the one the rating was measured in.

More important, the rating is measured with DC or low-frequency AC [5]. It captures $I^2 \times DCR$ and nothing else. It leaves out core loss, and it leaves out the AC winding resistance from skin and proximity effects. Coilcraft's guidance is that the AC resistance stays small next to the DCR below about 200kHz. Above 200–300kHz you should ask the supplier for loss-against-frequency data, because it isn't on the datasheet [5]. Our converter runs at 500kHz.

The DCR you're checking against is also specified at 25°C. Copper's temperature coefficient is about +0.4%/°C. So a part rated 0.51mΩ at 25°C is 0.63mΩ at 85°C, which is 24% more copper loss than the datasheet number gives [5]. The Buck Converter Losses Nobody Tells You About covers the AC winding mechanisms and the temperature dependence in more detail.

What the datasheet won't tell you: core loss under triangular flux

The final gap is the core-loss curve. When a manufacturer publishes one, it's almost always characterised under sinusoidal excitation, because that's the repeatable instrument condition. Your buck inductor sees a triangular flux waveform with a duty-cycle asymmetry, 15% up and 85% down in this design.

The classical Steinmetz equation is:

where:

• $P_v$ is the core loss per unit volume
• $f$ is the frequency of the sinusoidal excitation
• $\hat{B}$ is the peak flux density
• $k$, $\alpha$ and $\beta$ are the Steinmetz parameters fitted to the material's loss curves

It's only valid for sinusoidal excitation [7]. Applying it to a rectangular-drive waveform is an extrapolation, and at extreme duty cycles it isn't a small one. The standard fix is the improved generalised Steinmetz equation (iGSE) [8]. It handles any waveform with the same three Steinmetz parameters:

where:

• $P_v$ is the core loss per unit volume and $T_s$ is the switching period
• $B$ is the instantaneous flux density and $\Delta B$ is its peak-to-peak swing
• $\alpha$ and $\beta$ are the Steinmetz parameters from above
• $k_i$ is a constant derived from $k$, $\alpha$ and $\beta$

Later work extends this again to cover relaxation losses during the zero-voltage intervals that rectangular drive produces, which the iGSE treats as lossless [7].

For selection, the effect is modest. A datasheet core-loss figure read at your switching frequency and flux swing is an estimate, and its error grows as the duty cycle moves away from 50%. At $D$ = 0.15 you're a long way from 50%. Fig. 3 says core loss is a large share of the budget below about 0.4µH. If you're down there, check against the manufacturer's own loss calculator before trusting a hand-applied Steinmetz fit.

Putting it together

For the worked example, the selection comes down to a short list of checks:

Pick a standard value in the range. Check the peak against a saturation rating whose definition you've actually read. Check the RMS current against a thermal rating you've derated for your board and your switching frequency, and confirm where DCM starts. The ripple ratio was only ever a convenient way to parameterise that search.

Each of those checks belongs at the corner where it is worst. That means the peak current at the lowest inductance the DC-bias curve allows, and core loss for the real triangular flux waveform. I'm building switchmode.io to hold all of them at once, from each part's own datasheet curves. The buck inductor calculator covers the first step today. It sizes the inductance for your own design and gives the peak and RMS currents to check a part against.

References

[1] Texas Instruments, "AN-1197 Selecting Inductors for Buck Converters," SNVA038B, May 2001, rev. April 2013. [Online]. Available: https://www.ti.com/lit/an/snva038b/snva038b.pdf

[2] M. Jacob, "Select inductors for buck converters to get optimum efficiency and reliability," Texas Instruments Analog Design Journal, SLYT775, 3Q 2019. [Online]. Available: https://www.ti.com/lit/pdf/slyt775

[3] E. Wang, "Current Ripple Factor of a Buck Converter," Richtek Technology, Application Note AN009, April 2014. [Online]. Available: https://www.richtek.com/Design%20Support/Technical%20Document/AN009

[4] R. W. Erickson and D. Maksimović, Fundamentals of Power Electronics, 3rd ed., Springer, 2020.

[5] L. Crane, "Selecting the Best Inductor for Your DC-DC Converter," Coilcraft, Document 469, rev. 2017. [Online]. Available: https://www.coilcraft.com/en-us/resources/application-notes/selecting-the-best-inductor-for-your-dc-dc-convert/

[6] Vishay, "Inductor Saturation Current — Did You Know?," VMN-MS7373, 2017. [Online]. Available: https://www.vishay.com/docs/48155/_did-you-know_ihlp_saturation_vmn-ms7373.pdf

[7] J. Mühlethaler, J. Biela, J. W. Kolar and A. Ecklebe, "Improved Core-Loss Calculation for Magnetic Components Employed in Power Electronic Systems," IEEE Transactions on Power Electronics, vol. 27, no. 2, pp. 964–973, Feb. 2012.

[8] K. Venkatachalam, C. R. Sullivan, T. Abdallah and H. Tacca, "Accurate prediction of ferrite core loss with nonsinusoidal waveforms using only Steinmetz parameters," IEEE Workshop on Computers in Power Electronics (COMPEL), 2002, pp. 36–41.