In Part 1, we established why a voltage-mode buck converter needs a compensator: the LC output filter drives the plant phase to -158° at any practical crossover frequency, leaving only 22° of phase margin. The compensator's zeros recover that phase. The integrator eliminates the DC regulation error. The high-frequency poles roll off gain above crossover.

This article turns those concepts into component values. Starting from the design targets set in Part 1, I'll walk through every calculation, round to standard values, and verify the result.

Design targets (from Part 1)

24V input, 5V output, 100W, voltage-mode buck at 150 kHz. The plant parameters:

$f_{LC}$ = 4.95 kHz (L = 4.7 µH, C = 220 µF)
$f_{ESR}$ = 145 kHz (ESR = 5 mΩ)
Plant gain at 15 kHz: 3.1 dB
Plant phase at 15 kHz: -158°

The compensator targets:

Crossover frequency: 15 kHz ( $f_{sw}/10$ )
Phase margin: ≥ 55°
Two zeros near $f_{LC}$ to boost phase at crossover
Two high-frequency poles to roll off gain: one at $f_{sw}/2$ (75 kHz), one at $f_{ESR}$ (145 kHz)

The Type III circuit

Fig. 6 shows the compensator circuit [1]. It's an inverting op-amp configuration with six passive components forming the frequency-shaping network: three resistors ( $R_1$ , $R_2$ , $R_3$ ) and three capacitors ( $C_1$ , $C_2$ , $C_3$ ).

The input impedance consists of $R_1$ in parallel with $R_3 + C_3$ in series. The feedback impedance consists of $C_1$ in parallel with $R_2 + C_2$ in series. The transfer function is:

$G_c(s) = -\frac{Z_f}{Z_i} = -\frac{(1 + sR_2 C_1)(1 + s(R_1 + R_3)C_3)}{sR_1(C_1 + C_2)\left(1 + s\frac{R_2 C_1 C_2}{C_1 + C_2}\right)(1 + sR_3 C_3)}$

This gives three poles and two zeros:

Feature	Frequency	Components
Zero 1	$f_{z1} = \frac{1}{2\pi R_2 C_1}$	$R_2$ , $C_1$
Zero 2	$f_{z2} = \frac{1}{2\pi (R_1 + R_3) C_3}$	$R_1$ , $R_3$ , $C_3$
Pole 1	$f_{p1} = \frac{C_1 + C_2}{2\pi R_2 C_1 C_2}$	$R_2$ , $C_1$ , $C_2$
Pole 2	$f_{p2} = \frac{1}{2\pi R_3 C_3}$	$R_3$ , $C_3$
Integrator	$\frac{1}{sR_1(C_1 + C_2)}$	$R_1$ , $C_1$ , $C_2$

Notice that the second zero and second pole share the same components ( $R_3$ , $C_3$ ) but differ by whether $R_1$ is included. Since $R_1 \gg R_3$ in most designs, $f_{z2} \ll f_{p2}$ . The ratio $f_{p2}/f_{z2} = (R_1 + R_3)/R_3$ is set by the resistance ratio alone.

Fig. 6. Type III op-amp compensator. Six passive components create three poles (including the integrator at the origin) and two zeros. $R_1$ with $C_3$ and $R_3$ form the input network. $C_1$ with $R_2$ and $C_2$ form the feedback network.

Design procedure

The circuit has six components and five constraints (two zeros, two poles, and the crossover gain) leaving one free parameter. The standard approach [2][3] is to fix $R_1$ and derive everything else.

Step 1: Choose $R_1$

$R_1$ sets the input impedance of the compensator. For most designs, 1 kΩ to 100 kΩ is practical. Lower values will reduce noise sensitivity and higher values will reduce power consumption in the feedback divider.

$R_1 = 10\,\text{k}\Omega$

Step 2: Set the zero and pole frequencies

From Part 1, the compensator needs approximately 38° of phase boost at crossover (above the integrator's -90°) to achieve 60° PM. With two poles at 75 kHz and 145 kHz contributing -11° and -6° respectively at 15 kHz, the two zeros must provide approximately +145° combined.

The targets:

$f_{z1} = 3{.}2\,\text{kHz} \qquad f_{z2} = 6{.}2\,\text{kHz}$ $f_{p1} = 75\,\text{kHz} \qquad f_{p2} = 145\,\text{kHz}$

The zeros are placed below $f_{LC}$ (4.95 kHz), straddling the resonance from below. This provides maximum phase boost through the crossover region.

Step 3: Compute $R_3$ (from the zero/pole ratio)

The second zero and second pole share $C_3$ , so their ratio gives $R_3$ directly:

$\frac{f_{p2}}{f_{z2}} = \frac{R_1 + R_3}{R_3}$

Rearranging:

$R_3 = \frac{R_1 \cdot f_{z2}}{f_{p2} - f_{z2}} = \frac{10{,}000 \times 6{,}200}{145{,}000 - 6{,}200} = 447\,\Omega$

Step 4: Compute $C_3$ (second pole)

$C_3 = \frac{1}{2\pi f_{p2} R_3} = \frac{1}{2\pi \times 145{,}000 \times 447} = 2{,}456\,\text{pF}$

Verify $f_{z2}$ : $1/(2\pi \times (10{,}000 + 447) \times 2{,}456\,\text{pF}) = 6{,}200\,\text{Hz}$ . Correct.

Step 5: Compute $C_1$ and $C_2$ (first zero, first pole, and crossover gain)

The first zero and first pole are both set by $R_2$ , $C_1$ , and $C_2$ :

$f_{z1} = \frac{1}{2\pi R_2 C_1} \qquad f_{p1} = \frac{C_1 + C_2}{2\pi R_2 C_1 C_2}$

Dividing $f_{p1}$ by $f_{z1}$ eliminates $R_2$ :

$\frac{f_{p1}}{f_{z1}} = \frac{C_1 + C_2}{C_2}$

Rearranging gives $C_2$ in terms of $C_1$ :

$C_2 = \frac{C_1 \cdot f_{z1}}{f_{p1} - f_{z1}}$

This leaves $C_1$ as the only unknown. It's determined by the gain constraint: at crossover, $|G_c| \cdot |G_p| = 1$ .

Writing the compensator magnitude at crossover and substituting $C_1 + C_2 = C_1 \cdot f_{p1}/(f_{p1} - f_{z1})$ :

$|G_c(f_c)| = \frac{|1 + j\omega_c \tau_{z1}| \cdot |1 + j\omega_c \tau_{z2}| \cdot (f_{p1} - f_{z1})}{\omega_c \cdot R_1 \cdot C_1 \cdot f_{p1} \cdot |1 + j\omega_c \tau_{p1}| \cdot |1 + j\omega_c \tau_{p2}|}$

where $\tau_{z1} = 1/(2\pi f_{z1})$ , and similarly for the other time constants. Setting $|G_c| = 1/|G_p(f_c)|$ and solving for $C_1$ :

$C_1 = \frac{|1 + j\omega_c \tau_{z1}| \cdot |1 + j\omega_c \tau_{z2}| \cdot (f_{p1} - f_{z1}) \cdot |G_p(f_c)|}{\omega_c \cdot R_1 \cdot f_{p1} \cdot |1 + j\omega_c \tau_{p1}| \cdot |1 + j\omega_c \tau_{p2}|}$

Evaluating the magnitude terms at 15 kHz: $|1 + j\omega_c \tau_{z1}| = 4.77$ (the zero at 3.2 kHz is well below crossover, so this term is large), $|1 + j\omega_c \tau_{z2}| = 2.62$ , and the pole terms are both close to unity (1.02 and 1.01, since the poles are well above crossover). The plant gain $|G_p(f_c)| = 1.43$ .

With $\omega_c = 2\pi \times 15{,}000 = 94{,}248$ rad/s:

$C_1 = \frac{4.77 \times 2.62 \times 71{,}800 \times 1.43}{94{,}248 \times 10{,}000 \times 75{,}000 \times 1.02 \times 1.01} = 17.6\,\text{nF}$

Then $C_2$ :

$C_2 = \frac{17{,}600 \times 3{,}200}{75{,}000 - 3{,}200} = 784\,\text{pF}$

Step 6: Compute $R_2$ (first zero)

$R_2 = \frac{1}{2\pi \times 3{,}200 \times 17.6\,\text{nF}} = 2{,}826\,\Omega \approx 2.83\,\text{k}\Omega$

Summary of exact values

Component	Value	Role
$R_1$	10 kΩ	Input impedance (chosen)
$R_2$	2.83 kΩ	First zero, first pole
$R_3$	447 Ω	Second zero, second pole
$C_1$	17.6 nF	First zero, gain
$C_2$	784 pF	First pole
$C_3$	2,456 pF	Second zero, second pole

Rounding to standard values

Real components come in discrete values. The nearest E96 resistors and E12 capacitors:

Component	Exact	Standard	Shift
$R_1$	10.00 kΩ	10 kΩ	0%
$R_2$	2.83 kΩ	2.80 kΩ	-1.1%
$R_3$	447 Ω	442 Ω	-1.1%
$C_1$	17.6 nF	18 nF	+2.3%
$C_2$	784 pF	820 pF	+4.6%
$C_3$	2,456 pF	2.7 nF	+9.9%

$C_3$ has the largest rounding error because the exact value (2,456 pF) falls between the E12 values of 2,200 pF and 2,700 pF. The 2,700 pF choice shifts $f_{z2}$ from 6,200 Hz to 5,645 Hz and $f_{p2}$ from 145 kHz to 133 kHz. Both zeros move slightly lower, which adds a small amount of extra phase at crossover.

With standard values, the actual pole and zero locations:

Parameter	Target	Actual	Shift
$f_{z1}$	3,200 Hz	3,158 Hz	-1.3%
$f_{z2}$	6,200 Hz	5,645 Hz	-9.0%
$f_{p1}$	75,000 Hz	72,476 Hz	-3.4%
$f_{p2}$	145,000 Hz	133,363 Hz	-8.0%

The crossover frequency shifts from 15.0 kHz to 15.9 kHz. The phase margin changes from 60.0° to 61.0°. A one-degree improvement from component rounding. This is typical as the design has enough margin that standard-value rounding doesn't meaningfully degrade performance.

Verification

Fig. 7 shows the final loop gain Bode plot using the standard component values. The compensator gain (green) rises at +20 dB/decade from the integrator, flattens through the zero region where it provides phase boost, then falls above the poles at 72 kHz and 133 kHz. The resulting loop gain (navy) crosses 0 dB at 16 kHz with 61° of phase margin.

Fig. 7. Loop gain with standard component values. Crossover at 16 kHz, phase margin 61°. The two zeros straddle the LC resonance at 4.95 kHz, recovering phase through the crossover region. The two poles roll off the gain above crossover, providing attenuation at the switching frequency.

The loop phase never reaches -180°, giving infinite gain margin in the averaged model. The loop gain is well below 0 dB at 150 kHz, providing adequate attenuation of switching ripple.

What comes next

The design procedure above assumes nominal component values. In Part 3, I'll propagate worst-case tolerances through the compensator. What happens to phase margin when the output capacitance drops 40% from DC bias derating, the inductor shifts 20% from current derating, and the ESR drifts with temperature? That's where the difference between 60° at nominal and 60° at worst case becomes real, and where automated tolerance analysis earns its place in the design flow.

References

[1] Texas Instruments, "Demystifying Type II and Type III Compensators Using Op-Amp and OTA for DC/DC Converters," Application Report SLVA662, Jul. 2014. [Online]. Available: https://www.ti.com/lit/an/slva662/slva662.pdf

[2] H. D. Venable, "The K factor: A new mathematical tool for stability analysis and synthesis," Proc. Powercon 10, San Diego, CA, 1983. [Online]. Available: https://www.venableinstruments.com/hubfs/The%20K%20Factor%20a%20New%20Mathematical%20Tool%20for%20Stability%20Analysis.pdf

[3] C. Basso, Designing Control Loops for Linear and Switching Power Supplies, Artech House, 2012.